adder

An adder attacked my father.

一条小毒蛇攻击了我父亲。

High-speed digit-serial adder and its application.

高速数字串行加法器及其应用。

English: Whom an adder bites, dreads a lizard.

中文:一朝被蛇咬,十年怕井绳。

Timer setting:Ladder / Non-ladder adder.

定时功能:累加/不累加。

The adder is also the only British snake with a poisonous bite.

蝰蛇在英国也是唯一一种有毒的蛇。

Why, thou art as foul as the toal, and as loathsome as the adder.

看啊,你跟蟾蜍一样地难看,跟毒蛇一样地可恶。

You are as dirty as the toad, and as wicked as the adder.

“嘿!你和癞蛤蟆一样脏,和毒蛇一样邪恶。

His face was like the face of a toad, and his body like an adder!

他的脸跟癞蛤蟆的脸一样,身子就像条毒蛇!

Why, thou art as foul as the toad, and as loathsome as the adder.

看啊,你跟蟾蜍一样地难看,跟毒蛇一样地可恶。

He is as deaf as a post [stone, door-post, door-nail, an adder].

他完全聋了。

The mean value detector comprises a second adder and a multiplier.

平均值检测电路包括第二加法器和乘法器。

Optical full adder composed of a ZnS interference filter[J].

引用该论文 查子忠,王瑞波,张雷,李淳飞.

By far the most common snake in Britain is the adder.

在英国最常见的蛇是蝰蛇。

The adder is functionally verified and simulated using PSPICE.

已用PSPICE仿真工具对其进行了功能验证和仿真。

He will suck the poison of serpents; the fangs of an adder will kill him.

他必吸饮虺蛇的毒气。蝮蛇的舌头也必杀他。

This process requires that the adder used in multibit addition handle three inputs.

这就要求用于多位数相加的加法器具有三个输入端。

Do not stand a !adder on !oose materia! or !ean it against fragi!e materia!.

不要将梯子安放在松软或靠在易塌的物件上。

The adder has been functionally verified and simulated by using PSPICE.

该加法器已用PSPICE仿真工具进行了功能验证和仿真。

A logic element designed to act as either an adder or a subtracter in accordance with the control signal applied to it.

根据供给它的控制信号,或起加法器作用或起减法器作用的一种逻辑元件。

Switched capacitor( SC) unit delayer, positive negative proportors and adder were designed using two phase clocks.

用二相时钟设计了对寄生电容低灵敏的开关电容单位延时器、负比例器和加法器.

KJV] Thou shalt tread upon the lion and adder: the young lion and the dragon shalt thou trample under feet.

[新译]你必践踏狮子和虺蛇。你必踏碎少壮狮子和大蛇。

The concept used is that the bits of the two numbers to be added are made available to the adder synchronously.

所用的方法是,将相加两数的各位同步地输入到加法器中。

Reptile experts have been unable to find the adder with infrared devices or to coax it out of its hiding place with juicy bait.

专家们使用了红外线设备和诱饵,还是无法找到调皮的小蛇。

The paper proposes a five-input adder module with dual carry-out ,which can process more information.

本文提出了一种处理信息量较大的双进位五输入加法器模块。

Results show that the novel structure can realize the logic function of an adder successfully.

结果显示,这种新的全加器能正确完成加法器的逻辑功能。

We have done HSPICE simulation runs of the new style adder, 28-T CMOS full adder and conventional CPL style full adder.

并且通过HSPICE仿真,对28个晶体管的CMOS加法器、传统的CPL加法器和改进型的CPL加法器进行了比较。

On this basis, an improved current-mode CMOS ternary adder with threshold-controllable function was designed.

在此基础上设计了具有阈值控制功能的电流型CMOS三值全加器。

A fast carry-skip adder is proposed based on variable-sized two-level block carry-lookahead logic.

提出了一种基于方块超前进位的快速进位跳跃加法器。

Subword-parallel adder can efficiently improve the performance of multimedia application.

摘要 子字并行加法器能够有效提高多媒体应用程序的处理性能。

Aging factors on the role of the lives of repeated or supply process called "Adder.

加龄因素对生命的不断重复作用或供应过程,叫作“加法”。

Thou shalt tread upon the lion and adder: the young lion and the dragon shalt thou trample under feet.

你必践踏狮子和虺蛇。你必踏碎少壮狮子和大蛇。

So enhancing the performances of the 1-bit full adder cell is a significant goal.

根据最优化函数式,设计了高性能CMOS管级全加器单元电路。

The ideas presented in this paper are then demonstrated on the design of an ECL 1-bit full adder.

所提出的方法已用一位全加器的设计实例予以演示。

This kind of adder is a ripple carry adder, since each carry bit "ripples" to the next full adder.

这种平行加法器最低位的进位输入必须序列地通过所有全加器后,才能产生最终的结果。

Then, with a comparison of all types of high-speed adder, we choose Koggle-Stone PPA structure.

基于对多种并行前缀加法器的实现分析,采用了Koggle-Stone结构的加法器作为混合加法器的主体;

Because he sucked the poison of a viper, he will be killed by the fangs of an adder.

他原吸入了蛇的毒汁,毒蛇的舌头必将他杀死。

The practicability of the system is validated by implementing the simulation of a one-bit full adder based on FPGA.

在FPGA平台上用一个一位全加器的实例,验证了系统的可实现性。

The adder self-test is designed with such operations as left shift, logic AND for the test patterns, and so on.

借助于测试矢量左移、逻辑与操作等方式对加法器自测试进行了设计。

Dialog box and the text of the dialog box to start and systolic function, menu function, adder function.

对话框和文本,对话框展开和收缩功能,菜单功能,加法器功能。

Code to achieve a BCD adder, and a binary. Logic circuits can also be used to achieve this functionality.

实现一位BCD码的加法,并且带有进位。还可以利用逻辑电路实现此功能。

Designers also list influences such as Terry Gilliam, Black Adder, and Monty Python.

劣质防盗门则不具备三点锁定或自选三点锁定结构。

The simulation of pipeline adder proves that the compute speed is improved and it can be used in DMF.

流水线加法器仿真结果说明该结构提高了运算速度,可应用于数字匹配滤波器中。

The delay due to the carry propagation through the adder stages can be minimized when a carry-look-ahead scheme is used.

采用越级进位方式可以减小逐级进位造成的延时。

All snakes have small teeth, so it follows that all snakes can bite, but only the bite of the adder presents any danger.

所有的蛇都有小小的牙齿,因此,所有的蛇都咬人,但是只有被蝰蛇咬伤才有些危险。

The performance of two106 bits operands adder is simulated, and from the simulation results we can conclude the adder has many improvement in speed.

文中详细阐述了该算法的推导,以及部分硬件实现电路图,并对输入为两个106比特操作数的加法器进行了性能仿真,从仿真结果可以看出,新的加法器算法使先行进位加法器的速度得到很大的提高。

Then the Adder of Lincoln will coil round the Fox and announce its presence to the assembled Dragon with a terrifying hiss.

然后林肯郡的小毒蛇会盘绕在狐狸周围,宣布它的存在是连同着可怕的嘶嘶声而与龙组合在一起。

KJV] Dan shall be a serpent by the way, an adder in the path, that biteth the horse heels, so that his rider shall fall backward.

[新译]但要作路上的蛇,道中的毒蛇,他要咬伤马蹄,使骑马的人向后坠落。

The working principle and design procedure of thermocouple linearization are realized by ideal diode circuits with an adder.

摘要介绍了用理想二极管电路与加法器实现热电偶线性化原理及设计过程。

The optical path to realize binary addition by a carry look ahead adder is designed and the numerical result is presented.

基于仙农(shanon)的组合逻辑设计理论,用光学矢量-矩阵乘法器对超前进位加法器模型的光学实现进行了数值模拟。

Based on logic gates of complementary single-electron transistor (SET), three units are proposed as follows: full adder, shift register and ROM.

摘要基于互补型单电子晶体管(SET)逻辑门,提出了SET加法器、移位寄存器和ROM的单元电路。